TLDR: Bengaluru-based Maieutic Semiconductor has secured $4.15 million in seed funding to develop a generative AI-driven platform that aims to significantly accelerate and automate the traditionally manual process of analog chip design. This innovation is poised to reduce design cycles from weeks to days, addressing critical inefficiencies in a market projected to exceed $1 trillion by 2030.
Bengaluru, India – Maieutic Semiconductor, a pioneering deeptech startup, has successfully raised $4.15 million in seed funding to advance its groundbreaking generative AI (GenAI) platform for analog semiconductor design. The funding round was co-led by prominent investors Endiya Partners and Exfinity Venture Partners, signaling strong confidence in the startup’s vision to transform a historically challenging segment of chip manufacturing.
Founded in March 2025 by a team of seasoned industry veterans – Gireesh Rajendran (CEO), Ashish Lachhwani (CBO), Rakesh Kumar (CPO), and Krishna Sankar (CTO) – Maieutic Semiconductor brings a collective 10 decades of experience in chip design, AI applications, and product development, along with over 70 patents. Rajendran, Lachhwani, and Kumar previously co-founded Steradian Semiconductors, which was successfully acquired by Renesas Electronics in 2022.
The core mission of Maieutic Semiconductor is to tackle the longstanding inefficiencies inherent in analog integrated circuit (IC) development. Unlike digital chip design, which has largely benefited from advanced automation tools, the design of analog components remains a predominantly manual, time-intensive process heavily reliant on deep domain expertise. These analog chips are crucial for a vast array of modern technologies, including 5G, automotive systems, and IoT devices, performing vital functions such as signal processing and conversion.
“We’re combining decades of deep analogue and semiconductor experience with cutting-edge AI techniques,” stated Gireesh Rajendran, CEO of Maieutic Semiconductor. “Our copilot reduces the design cycle from weeks to days and brings intelligence to every trade-off.” This GenAI-driven copilot aims to automate early-stage analog chip design workflows, encompassing critical tasks like optimizing circuit topologies, identifying anomalies, streamlining design reviews, and intelligently analyzing trade-offs. The anticipated benefits include enhanced precision, scalability, significant cost advantages, and a faster time-to-market for new products.
Ashish Lachhwani, CBO, highlighted the industry’s stagnation in analog design tools. “Today, we are using the same tech tools as we did in the past. However, customer pain points have shifted due to workforce challenges. Hiring the right talent for chip designing is a primary concern now. That’s why not many semiconductor companies are coming up despite government initiatives,” he explained. He further added, “The design cycle for smaller projects takes around 15 months, while complex ones can last up to 24 months. We want to shorten this cycle by lowering the entry barriers for design companies and allowing them to operate faster without human dependence.” Lachhwani emphasized that “Much of the current workflow relies heavily on human expertise. But as processes evolve, the shift towards tool-based solutions becomes inevitable. Wherever there are manual interventions, agentic tools can take over.“
Sateesh Andra, Managing Partner at Endiya Partners, underscored the significance of Maieutic’s approach: “Analogue workflows have remained largely manual. Maieutic’s AI-first approach can make the process faster, more intelligent, and globally competitive.” Chinnu Senthilkumar, Managing Partner at Exfinity, echoed this sentiment, noting that “Automation in analog and mixed-signal design has been a black art [well, almost] or tribe knowledge limited to a community of specialists. Every chip comes with digital and analog components. Much has been done to automate the digital side over the past 30 years. But the analog part, typically 5-10% of the chip, has eluded automation. With GenAI and the specialised ‘tribe’ [community] knowledge, it’s now possible to automate analog design and improve the cycle.“
Maieutic’s technology stack is built upon open-source foundational models, which are then fine-tuned using curated, proprietary datasets combined with specialized knowledge in analog design. The initial focus for their application will be high-demand areas such as battery management systems, mixed-signal sensors, and wireless technologies (Wi-Fi and Bluetooth). The company plans to generate revenue through a subscription-based model for its GenAI-powered design tool.
Currently, Maieutic Semiconductor is actively engaging with three global customers, with commercial deployment of its platform anticipated next year. The startup is also gathering extensive data and problem statements from potential clients to further train its GenAI application, with the next major milestone being the deployment of prototypes to customers.
This initiative comes at a critical time for the global semiconductor market, which is projected to surpass $1 trillion by 2030. India, with its increasing emphasis on semiconductor manufacturing and design, supported by initiatives like the INR 76,000 Crore semiconductor mission and design-linked incentive (DLI) scheme, provides a fertile ground for homegrown innovations like Maieutic’s. Chinnu Senthilkumar noted, “With the Make-in-India initiative gaining momentum, the timing could not have been better for Maieutic to enter the market. The ecosystem is ripe for innovation, and startups emerging across the board have the potential to serve global markets.“
Also Read:
- XMOS Advances Development Tools with Generative AI for Enhanced Abstraction
- 1001 AI Secures $9 Million Seed Funding to Revolutionize Industrial AI in MENA
While global players like US-based Cognichip and Canada-based Astrus are also exploring the intersection of GenAI and semiconductor design, Maieutic’s founders view their differentiated technology and deep expertise as key advantages. The company is rapidly expanding its engineering team, aiming for 25-30 members within a year, and is actively pursuing partnerships with global foundries and Electronic Design Automation (EDA) firms, including securing country-specific certifications for its software.


