TLDR: This research explores accelerating hybrid machine learning models, specifically those combining Hyperdimensional Computing (HDC) and Convolutional Neural Networks (CNNs), by implementing custom instructions on RISC-V-based GPUs. The study demonstrates a significant speedup (up to 56.2 times) for specific HDC operations like “Bound” using a custom Vortex GPGPU architecture. While the overall performance gain for image classification was modest due to encoding bottlenecks, the work highlights the potential of custom RISC-V GPU instructions for energy-efficient, high-performance AI.
In the rapidly evolving world of artificial intelligence, machine learning models, especially those based on neural networks, have made incredible strides. However, this progress often comes with a significant cost: high energy consumption and computational demands. This is particularly challenging for applications in environments where energy efficiency is crucial, such as edge devices.
One promising alternative is Hyperdimensional Computing (HDC), a lightweight machine learning approach inspired by the human brain. HDC is known for its high parallelism and low power consumption. Yet, it faces limitations in accurately recognizing complex images. To overcome this, researchers have proposed hybrid models that combine HDC with Convolutional Neural Networks (CNNs), leveraging the strengths of both.
Traditional GPUs, while powerful for general-purpose parallel processing, often encounter memory bottlenecks when handling HDC operations. This limits the overall efficiency of these hybrid models. This is where the open-source nature of RISC-V architecture offers a unique advantage. Just as RISC-V CPUs have become a foundation for specialized accelerators, RISC-V GPUs have the potential to provide a flexible and programmable platform for high-speed, energy-efficient computation, even in areas where conventional GPUs fall short.
A Novel Approach: Custom Instructions on RISC-V GPUs
A recent study by Wakuto Matsumi and Riaz-Ul-Haque Mian introduces a computational framework designed to accelerate HDC-CNN hybrid models. Their work focuses on implementing custom instructions for GPU-based HDC operations on a RISC-V GPU. This approach aims to enhance the applicability of these hybrid models by addressing the challenges of energy-efficient, high-performance computing.
The researchers utilized the open-source Vortex GPGPU, which is based on the RISC-V Instruction Set Architecture (ISA). They designed four custom GPU instructions specifically tailored for HDC operations. These instructions are engineered to significantly reduce memory access overhead and minimize computation cycles, thereby boosting processing speed.
A key area of optimization was the ‘Bound’ operation, which involves accumulating class-wise sums from pre-encoded training data. In conventional GPU architectures, this process can be slow due to extensive memory-to-register transfers and limited general-purpose registers. The proposed solution introduces 32 cumulative sum registers per thread, allowing for simultaneous retrieval of multiple counters and parallel execution of arithmetic units. This drastically reduces memory dependency and enables one-cycle execution per accumulation, a significant improvement over traditional methods that might require 32 cycles.
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Experimental Insights and Future Directions
The experimental analysis, conducted using a cycle-accurate simulator for the Vortex GPGPU, yielded impressive results for specific operations. For a microbenchmark focusing on the ‘Bound’ operation, the custom instructions achieved a remarkable speedup of approximately 56.2 times compared to the baseline GPU. This improvement is attributed to parallelization, more efficient instruction cache usage, and better data cache utilization through registerization.
However, when evaluating the custom instructions on a full image classification benchmark (using the MNIST dataset), the overall performance improvement was more modest, around 2%. The study identified that the majority of the computation time in the image classification benchmark was dominated by the encoding process, which involves matrix operations. These operations have lower parallelism compared to HDC operations like ‘Bound’, making encoding the primary bottleneck.
This research highlights that while custom instructions can dramatically accelerate specific HDC operations, optimizing the entire hybrid model requires further attention to other computational bottlenecks, particularly matrix operations involved in encoding. Future work will involve evaluating circuit size and power consumption, measuring the overall performance of the HDC-CNN hybrid model, and implementing additional custom instructions to support other HDC computations. The integration of optimized matrix computation techniques remains a key challenge for further accelerating overall processing.
This study paves the way for more energy-efficient and high-performance AI systems, especially for hybrid models that combine the best features of different machine learning paradigms. You can read the full research paper here.
