TLDR: This research paper introduces the SLAC Neural Network Library (SNL) and its Python extension, Auto-SNL, designed to deploy real-time machine learning inference models on FPGAs for high-rate experimental facilities like LCLS-II. SNL allows dynamic model weight updates without FPGA resynthesis, enhancing flexibility. Auto-SNL simplifies the conversion of Python-based neural network models into SNL-compatible hardware code. A benchmark comparison against hls4ml, a state-of-the-art tool, on a Xilinx ZCU102 FPGA shows that SNL achieves competitive or superior latency in most tested architectures, sometimes with FPGA resource savings, particularly for CNNs. While SNL uses more BRAM and FF, it offers significant latency advantages, especially for complex models, making FPGA-based ML more accessible for scientific applications.
Modern scientific facilities, such as the Linac Coherent Light Source II (LCLS-II), are pushing the boundaries of data generation. These facilities produce X-ray pulses at an astonishing rate of up to 1 MHz, leading to data throughputs that can exceed 1 terabyte per second (TB/s). Managing such immense data streams poses significant challenges, as traditional data transmission and storage methods become incredibly expensive and often too slow for real-time analysis.
Machine learning (ML) offers a powerful solution for real-time data reduction, allowing for immediate insights at the source. However, conventional ML implementations on CPUs and GPUs often introduce too much latency, making them unsuitable for the ultra-high-speed demands of these experimental environments, where inference pipelines need to operate within microsecond-scale budgets. This is where Field-Programmable Gate Arrays (FPGAs) come into play, offering a compelling choice for low-latency, high-throughput ML inference right at the edge of data acquisition.
To address these critical needs, the SLAC National Accelerator Laboratory developed the SLAC Neural Network Library (SNL). This specialized framework is designed to deploy real-time ML inference models directly onto FPGAs. A standout feature of SNL is its ability to dynamically update model weights and biases without requiring the FPGA to be completely reconfigured (resynthesized). This flexibility is crucial for adaptive learning applications and allows for rapid iteration and deployment in fast-paced scientific experiments.
To make this powerful technology more accessible and user-friendly, the researchers introduced Auto-SNL. This is a Python extension that simplifies the process of converting neural network models, originally defined in popular Python frameworks like Keras and TensorFlow, into SNL-compatible high-level synthesis (HLS) code. Auto-SNL abstracts away many of the complex hardware details, enabling researchers and academics who may not be FPGA experts to generate optimized hardware configurations and control parameters without deep engagement with FPGA toolchains.
The paper presents a detailed benchmark comparison of SNL and Auto-SNL against hls4ml, which is considered a state-of-the-art open-source tool for deploying ML models on FPGAs. The comparison was conducted across various neural network architectures, different fixed-point precisions (which determine the accuracy and resource usage), and synthesis configurations. The target hardware for this evaluation was a Xilinx ZCU102 FPGA.
The benchmark included four diverse neural network models: a particle jet classifier for high-energy physics, a fully connected autoencoder for anomaly detection in machine operating sounds, a convolutional neural network (CNN) for keyword spotting in audio data, and another convolution-based model for visual wake word detection. These models represented a range of complexities and layer types.
The results of this extensive comparison showed that SNL achieves competitive or, in many cases, superior inference latency compared to hls4ml across most of the tested architectures. This latency advantage was particularly noticeable for convolutional neural networks, where SNL often outperformed hls4ml, especially as hls4ml’s reuse factor (a parameter that trades off parallelism for resource savings) increased. For fully-connected neural networks, SNL also demonstrated notable savings in DSP (Digital Signal Processor) and LUT (Look-Up Table) resources, particularly at higher precisions.
However, the study also highlighted some trade-offs. SNL consistently used more BRAM (Block RAM) and often higher FF (Flip-Flop) counts than hls4ml. While SNL showed strong latency performance, hls4ml currently offers more fine-grained control over the resource-latency trade-offs through a wider range of adjustable synthesis parameters beyond just input and weight precision. The paper also noted some instances where SNL synthesis failed for certain model-precision combinations due to resource limitations, similar to some failures observed with hls4ml.
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In conclusion, SNL, coupled with Auto-SNL, represents a significant step forward in making real-time ML inference on FPGAs more accessible and efficient for high-rate experimental environments. Its ability to dynamically update model weights without resynthesis is a key advantage for adaptive scientific applications. While there are areas for future development, such as expanding the parameter space for user control and targeting more FPGA boards, the current work demonstrates SNL’s versatility and its potential to open new opportunities for researchers in fields like high-energy physics, medical imaging, and robotics. You can read the full research paper here.
